By the end of this lesson, the technician will be able to:
The Conveyor That Wouldn't 'Just Start': A conveyor won't start. The operator presses START; nothing. The electrician before you checked the motor, the starter, the overloads — all healthy. The work order is drifting toward "PLC problem, call integrator."
With authorization, you connect a laptop in monitor-only mode and find the conveyor's start rung. Ladder diagnostics is a spectator sport: the software highlights every instruction that is logically TRUE. You read the rung left to right like a sentence: START pushbutton — highlights when pressed, good. STOP pushbutton (an XIC instruction) — highlighted, good. Overload OK — highlighted. Downstream conveyor running — dark. There it is. The rung requires the downstream conveyor to be running first — an interlock nobody mentioned — and the downstream conveyor is in a maintenance bypass tonight.
Nothing was broken. The machine was obeying a rule the operator didn't know existed. You start the downstream conveyor per procedure; the rung completes; the motor runs. Total time at the panel: four minutes — because the highlighted rung shows exactly which condition is missing. The technician who can read three instructions and follow highlighting doesn't guess at interlocks; the logic names them.
Ladder logic is the dominant PLC programming language because it was drawn to look like the relay schematics electricians already read: two vertical power rails, horizontal rungs, conditions on the left, results on the right. A rung is a sentence: IF this combination of conditions is true, THEN do this.
The entire language stands on three instructions:
XIC asks one question: is this bit a 1? If the bit is ON, the instruction is TRUE and passes logical continuity. The name is the trap: XIC examines a bit in memory, not a physical contact. That bit might come from an input (the image table state of a pushbutton), an internal flag, a timer's done bit, or an HMI button. XIC = "true if ON."
XIO asks the inverse: is this bit a 0? If the bit is OFF, the instruction is TRUE and passes continuity. XIO = "true if OFF." It is the logic of absence: run the fan IF the door switch is NOT made; alarm IF flow is NOT proven.
OTE sits at the rung's right end and writes a bit: rung true → bit set to 1; rung false → bit set to 0, every scan. Two properties matter enormously in the field:
The most important rung pattern in industry:
[XIC Start_PB] --+-- [XIC Stop_PB] -- [XIC OL_OK] -- (OTE Motor_Run)
[XIC Motor_Run] -+
Press START: the rung completes, Motor_Run turns ON. The XIC Motor_Run branch in parallel with the START button now passes continuity — the output holds itself in after the button is released. Press STOP (its bit goes to 0, the XIC goes false): the rung breaks, Motor_Run drops, and the seal-in branch drops with it. Every motor start circuit, every "cycle on" latch is a variation of this pattern, and reading it fluently is the price of admission to Lesson 7.6.
Here is where most field misdiagnoses are born — read this section twice.
An XIC is true when its bit is 1. Whether that bit is 1 when a field device is pressed, released, blocked, or clear depends on how the device is wired (NO or NC, per Lesson 6.2) — a fact the instruction symbol cannot tell you.
Naive expectation: STOP stops things, so it must be the "open" instruction. Industrial reality inverts it:
The payoff is fail-safe behavior: if the stop button's wire breaks or its terminal corrodes open, the bit goes to 0 — exactly as if STOP were pressed — and the machine stops. A broken stop circuit stops the machine instead of creating a machine that cannot be stopped. Wire the stop as NO/examine with XIO and the failure mode inverts catastrophically: a broken wire makes the stop button decorative. This NC-wired/XIC-examined convention is universal in well-built machines (and for true safety functions — E-stops, guard interlocks — hardwired safety relays/controllers rated for the task do the stopping, with the PLC merely informed; safety circuit specifics are SME/engineering territory, per Lesson 1.x boundaries).
Monitor mode highlights each instruction that is logically true this scan — not each device that is "active." The diagnostic recipe: find the output that should be on, walk its rung left to right, and the first dark instruction is the missing condition. Then translate that instruction back through the addressing chain (Lesson 7.3) to a physical cause: dark XIC = its bit is 0 (device not made, wiring open, or upstream logic never set it); dark XIO = its bit is 1 (device made when it shouldn't be, or a flag stuck on). The highlighted-rung skill plus the image-table split from Lesson 7.1 (terminal vs. bit vs. logic) sorts virtually every "machine won't run" call into field problem or unsatisfied interlock — usually in minutes.
| Instruction | Symbol | True When | Field Reading of a DARK (false) instruction | Field Reading of a LIT (true) instruction |
|---|---|---|---|---|
| XIC (Examine If Closed) | ⊣ ⊢ | Bit = 1 | The bit is OFF: device not actuated / NC device's circuit opened / upstream logic hasn't set the flag | Bit is ON |
| XIO (Examine If Open) | ⊣/⊢ | Bit = 0 | The bit is ON: device actuated when logic expects it clear / stuck flag | Bit is OFF |
| OTE (Output Energize) | ( ) | Writes: rung true → 1, rung false → 0 (every scan, non-retentive) | Rung has no continuity — find the first dark condition | Rung complete — if the real-world load is still dead, the problem is downstream (Lesson 7.3 output chain) |
Common wiring/logic pairings to memorize:
| Function | Field Device Wiring | Instruction | Why |
|---|---|---|---|
| START button | NO (open until pressed) | XIC | True only while pressed; seal-in holds after |
| STOP button | NC (closed until pressed) | XIC | Fail-safe: broken wire = stop |
| Overload/fault contact | NC (closed when healthy) | XIC | Fail-safe: lost signal = trip |
| "Guard must be closed to run" | NC interlock switch | XIC | Open guard or open wire both block running |
| "Alarm when flow lost" | Flow switch NO or NC per design | XIO or XIC per wiring | Check the drawing — the instruction alone cannot tell you |
Boundaries — absolute: Laptop connection is monitor/read-only. No edits, no forces, no mode changes — forcing I/O can start machinery and is governed by strict site authorization (Lesson 7.6 and site policy). Physical verification near moving equipment follows LOTO (Lesson 1.2); panels follow electrical safe-work rules (Lessons 1.5/5.1).
[XIC Start] + [XIC Mixer_Run seal-in branch] — [XIC Stop_PB] — [XIC OL_OK] — (OTE Mixer_Run). Current state: Start and the seal-in branch are dark (motor is off, button not pressed), XIC Stop_PB is dark, XIC OL_OK is lit. Pressing START lights the Start XIC momentarily but the rung never completes. The stop button on the console is not pressed and springs freely. What is the most defensible diagnosis?The rung tells you exactly which condition is withholding continuity: the stop instruction. Answer C contradicts the displayed evidence — OL_OK is lit, the overload bit is healthy. Answer A fails on architecture (Lesson 7.1): a button press lasting any human duration spans hundreds of scans; "pressed too fast" is folklore. Answer D blames the one part of the rung behaving exactly per the universal pattern — the seal-in is dark because the output is off, which is correct. The subtle skill being tested is the XIO misconception in reverse: a dark XIC on a stop button does not mean someone is pressing stop — it means the bit is 0, and an NC-wired stop circuit's bit goes to 0 for either of two reasons: a finger on the button, or any break in the circuit. The button visibly isn't pressed, so the circuit is broken somewhere — and this is the fail-safe design doing its job: the machine that cannot verify its stop circuit refuses to run. The chase is now pure Lesson 7.3: LED, terminal, contact block, wire.